According as the semiconductor devices are further miniaturized, the problems with soft errors resulting from environmental radiation such as cosmic-ray terrestrial neutrons and α rays have come to the surface especially for SRAMs, logic gates, clock systems and so forth. When a neutron having an extremely high energy plunges into atomic nuclei comprising such devices, nucleons (neutrons, protons) in the nuclei repeatedly impinge on one another so that nucleons having a particularly higher energy are released from the nuclei. When the nucleons are placed in the state where they have no more kinetic energy to plunge out of the nuclei, the process in which light particles such as protons, neutrons, deuterons, alpha particulates are evaporated from the remained nuclei in excitement continues, with the result that due to the fact that the remained nuclei also have a recoil energy, those secondary particles as a whole fly within the devices by a distance corresponding to their specific ranges.
When α rays generated from radioisotopes contained in the semiconductor packages and the secondary ions having a charge resulting from nuclear reaction pass through the depletion layer of the storage node of an SRAM in the ‘high’ state, electrons are absorbed by the node; electron holes flow oppositely to the normal direction; and the charge is collected at the storage node through the funneling mechanism by which a charge collection region expands along the tracks of the ions. As the result of it, when the charge more than the critical charge is collected thereat, the ‘high’ state transits to the ‘low’ state so as to cause a soft error (hereinafter referred to as SEU or abbreviation of Single Event Upset).
This is the typical mechanism known to date to cause an soft error resulting from environmental radiation, which error is again called SEC (Single Event Upset).
There are cases where such SEU occurs for the memory circuit or for the logic circuit of the memory device.
As for the SEU of the memory device, the case where a plurality of cells cause an error at the same time is called MCU (Multi Cell Upset), which is distinguished from SBU (Single Bit Upset). The SBU and the common MCU are repairable by ECC (Error Correction Code), but when an MBU (Multi Bit Upset) included in the MCU happens in which an error happens within the same word, it is not repairable by the conventional ECC, so that it causes the system down.
In recent years, according as the semiconductor devices are further miniaturized, keen attention has been paid to the problem with the SEU happened for the logic circuit. The noise (SET: Single Event Transient) resulting from environmental radiation and happening at the logic gate causes an inversion of an FF (Flip-Flop) so as to bring, about a malfunction of the logic circuit. An SET happened at a combinational logic circuit comprising AND-OR-Inverter and having no memory device turns out to be an SEU when it propagates within the circuit and is latched (data retention) by an FF and as such. A redundancy code can not be added to the logic circuit, so that a soft error happening for the logic circuit is not reparable by the ECC and as such. Thus, it requires a method other than the ECC to prevent a soft error from happening on the logic circuit.
As one of the prior art references on the method for estimating a soft error rate (SER) of the logic circuit and improving thereon at the stage of designing the circuit, there is disclosure in the abstract of Patent Document 1 (International Publication No. 2007-034548) saying ‘a CAD apparatus comprising a means for specifying a signal transfer delay time of the respective signal transfer circuits of the LSI circuit; a means for specifying an output inversion rate of a flip-flop circuit of the respective signal transfer circuits when the former is exposed to radiation; a means for specifying the signal transfer circuit resulting in a critical path; a means for computing a soft error rate of the LSI circuit as a whole based on the signal transfer delay time, the output inversion rate and a clock period; and a means for lowering the soft error rate of the LSI circuit as a whole such that the signal transfer delay time of the signal transfer circuit resulting in the critical path does not change when the predetermined soft error rate is lower than the soft error rate of the LSI circuit as a whole’.
Differently from a hard error (permanent failure of a hardware), the soft error including an SEU is faced with such a problem as making it hard to specify a factor of such error owing to the fact that data is afresh renewed after the occurrence of such error and the software returns to the normal operation through restart. This means that the influences that the soft error gives on the logic circuit cause malfunctions of the processors, ASICs, digital control circuits of a computer, so that it is apprehended that they turn out to be factors causing malfunctions of the electronic system.
Conventionally, as one example of performing the system performance evaluation and verification, there is disclosure on a discrete events simulation in which the queuing theory is applied in Nonpatent Document 1 (International Publication No. 2007-034548) (Development of a Simulator for the Network Type Queuing Theory System), which simulator is characterized in comprising the steps of inputting i) the number of windows and the disposition of the windows, ii) network structure, iii) branching probability, iv) probability distribution as discrete events models and performing simulation on the given models so as to detect bottlenecks; outputting a change in the number of people within the system, a chronograph of the number of people within the system so as to facilitate various types of network type queuing theory models to be constructed.
Further, in Nonpatent Document 2 (A technique for Estimating the Number of Soft Errors of the Computer System with the Operation of the Program Taken into Account), with the proposals of the model by which the number of soft errors of the computer system comprising a CPU, a cache memory and a main memory and the estimation algorism of the simulation basis, there is disclosure that as the result of experiments, the smaller the number of soft errors affecting the system operation becomes, the larger the cache size becomes; the larger the cache size becomes, the more the SERs of the cache module increases while the smaller the number of soft errors happening during the execution of the program becomes; and the number of soft errors is largely controlled by the types of the application programs.